概述

The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog? to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.

特点

64kB FIFO深度

适用于单通道和多通道ADC

与VisualAnalog?软件配合使用

基于Virtex-4 FPGA

可能需要适配器，才能与某些ADC评估板接口

允许对SPI控制进行编程 每个通道的DDR编码速率高达644 MSPS SDR / 800MSPS

每个通道的DDR编码速率