ADSP-BF533SBBCZ500

发布时间:2019/1/24

概述

The ADSP-BF533 provides a high performance, power-efficient processor choice for today's most demanding convergent signal processing applications. The high performance 16-bit/32-bit Blackfin? embedded processor core, the flexible cache architecture, the enhanced DMA subsystem, and the dynamic power management (DPM) functionality allow system designers a flexible platform to address a wide range of applications including consumer, communications, automotive, and industrial/instrumentation.

Architectural Features

High performance 16-bit/32-bit embedded processor core

10-stage RISC MCU/DSP pipeline with mixed 16-bit/32-bit ISA for optimal code density

Full SIMD architecture, including instructions for accelerated video and image processing

Memory management unit (MMU) supporting full memory protection for an isolated and secure environment

High Level of Integration

Up to 148 kB of on-chip SRAM

Glueless video capture and display port

Two dual-channel, full-duplex, synchronous serial ports supporting eight stereo I2S channels

12 DMA channels supporting one- and two-dimensional data transfers

Memory controller providing glueless connection to multiple banks of external SDRAM, SRAM, Flash, or ROM

160-ball mini-BGA, 169-ball PBGA packages

Industrial temperature ranges (40°C to 85°C) and commercial temperature ranges (0°C to 70°C) available


特点

Application-tuned peripherals provide glueless connectivity to general-purpose converters in data acquisition applications

Large on-chip SRAM for maximum system performance